Published: July 27, 2026 | Reading Time: ~14 minutes | Channel: techminute
Four years ago, if you'd told anyone that NVIDIA would be shipping a server CPU that beats AMD's best Epyc in integer throughput while running fewer threads, they'd have laughed you out of the room. CPUs were Intel and AMD's turf — NVIDIA made GPUs, and its Grace CPU was an Arm off-the-shelf design meant to feed data to its accelerators, not compete on its own merits.
Today, that laughter has stopped. On Monday morning, NVIDIA dropped the full architectural whitepaper for Vera, its first custom-designed server CPU core in years. Alongside it came the first SPEC CPU 2026 benchmark numbers — unofficial, but run on real pre-production silicon — and the results have reset expectations about what a company known for graphics can do in the general-purpose compute market.
Vera isn't a side project. It's a declaration. And the numbers back it up.
NVIDIA's CPU ambitions have been building for years. The Grace CPU, launched in 2023 using Arm's Neoverse V2 design, was always a means to an end: a competent CPU that could feed data to Hopper and Blackwell GPUs without the latency and power penalty of running x86 chips over PCIe. Grace succeeded at that narrow mission — Meta, notably, deployed hundreds of thousands of Grace standalone servers — but it was never going to compete with Xeon or Epyc on general server workloads.
Vera changes the equation completely. Announced at GTC 2026 in March and formally launched into production at Computex in June, Vera is NVIDIA's first CPU built from the core up. The "Olympus" core is a ground-up custom Armv9.2 design, not a licensed Neoverse derivative. And NVIDIA has already hand-delivered the first units to OpenAI, Anthropic, SpaceX, and Oracle Cloud Infrastructure.
The timing is no accident. The server CPU market is exploding — driven not by traditional cloud workloads but by agentic AI. As Ian Buck, NVIDIA's VP of hyperscale, put it in a presentation last week: agents have made CPUs "much more integral. Particularly how fast a CPU can answer one question." In an AI factory, the CPU doesn't just feed the GPU anymore. It runs sandboxes, compiles generated code, executes tool chains, manages KV caches, and orchestrates multi-step agent workflows. A slow CPU means idle GPUs — and idle GPUs at scale are a financial catastrophe.
NVIDIA estimates the server CPU market could eventually reach $200 billion. Bernstein had it at roughly $37 billion for 2025. NVIDIA is betting the agentic AI explosion makes the difference, and Vera is designed specifically to capture that delta.
This is where things get genuinely interesting. The Olympus core isn't a radical departure from modern CPU design — NVIDIA isn't pulling a Denver-style rethink — but it's an exceptionally aggressive implementation of contemporary paradigms with some clever twists.
Olympus starts with a neural branch predictor that can spit out 2 branches per cycle with high accuracy. That feeds into an instruction fetch unit capable of pulling 16 instructions (64 bits each) per cycle into a 48-entry decode queue. From there, a 10-wide decoder can dispatch up to 10 fused instructions per cycle into the back-end.
The L1 instruction cache is 64KB, 4-way — twice the size of AMD's Zen 5 L1i and matching Intel's Cougar Cove. For AI agent workloads, which are notoriously branch-heavy with large instruction footprints, this is a meaningful design choice. Agents don't run tight loops; they jump through interpreters, compilers, and dependency graphs. A big, fast L1i cache with an accurate branch predictor is exactly what you want.
The out-of-order execution engine can rename up to 10 micro-ops per cycle, keeping pace with the decoder. NVIDIA isn't disclosing the reorder buffer size or register file dimensions — the two numbers that would most directly tell us how deep the speculation window goes — but they did reveal some techniques they're using to extract instruction-level parallelism:
These are all techniques you'll find in the highest-end x86 cores. Olympus deploys them on Arm.
The Olympus back-end is where the core earns its keep. 18 execution pipes per core, organized in pairwise configurations:
| Pipe Type | Count | Handles |
|---|---|---|
| Integer ALU (simple) | 8 | Add, subtract, logical, branches |
| Integer ALU (complex) | 2 of 8 | Multiply, divide, CRC, bit shifts |
| Vector / FP | 6 | 6×128-bit SVE2 with native FP8 |
| Load | 4 | Memory loads |
| Store | 2 | Memory stores |
Basic ALU operations complete in a single cycle. Multiplies take as few as 2 cycles. Divides range from 5 to 20 cycles depending on iteration count.
The 6 vector pipes support 6×128-bit SVE2 with native FP8 — up from the 4×128-bit SVE2 on Grace. That FP8 support is notable: it's a precision format born in AI inference, and having it natively in a server CPU core means Vera can participate in lightweight inference tasks that would otherwise waste GPU cycles.
The L2 cache is 2MB per core (double Grace's 1MB), and the unified L3 cache across all 88 cores is 164MB. The on-die Scalable Coherency Fabric (SCF) provides 3.4 TB/s of bisection bandwidth — and because Vera uses a monolithic compute die rather than chiplets, there's no cross-chiplet latency penalty. All 88 cores see uniform access to cache and memory.
One of the more unusual design choices: Vera uses Spatial Multithreading (SMT), not the temporal SMT (a.k.a. Hyper-Threading) that Intel and AMD use. In temporal SMT, two threads time-share the same execution resources. In spatial SMT, each of the 88 physical cores is partitioned into two logical threads with dedicated resources — hence "176 threads through physical resource partitioning."
The pairwise organization of the execution pipes (8 ALU, 6 vector, 4 load, 2 store — all even numbers) is deliberate: when running two threads per core, each thread gets roughly half the pipes. This provides more predictable performance under full load than temporal SMT, where two threads compete unpredictably for the same resources. For agentic workloads running thousands of concurrent sandboxes, predictability matters as much as peak throughput.
Vera's memory design is perhaps its most aggressive feature. The chip supports up to 1.5TB of LPDDR5X in the new SOCAMM2 form factor — detachable, field-replaceable modules that combine laptop-class power efficiency with server-class serviceability. Memory bandwidth hits 1.2 TB/s, which is roughly 2x the bandwidth of DDR5-based x86 servers at half the power.
For agentic workloads, this is critical. Each agent sandbox needs its own memory space. Running thousands of concurrent environments means you're constantly moving data between memory and cores. The 1.2 TB/s of bandwidth — combined with 3x the bandwidth-per-core of leading x86 designs — means Vera can keep more sandboxes fed simultaneously.
NVLink-C2C provides 1.8 TB/s of coherent bandwidth between Vera CPUs and Rubin GPUs, creating a unified memory architecture where CPU and GPU can share data without explicit copies. For the Vera Rubin NVL72 rack — with 72 Rubin GPUs and 36 Vera CPUs — this means the CPU isn't just a host; it's a peer in a coherent memory domain.
This is the section everyone's been waiting for. NVIDIA ran the SPECrate2026 integer suite on a dual-socket Vera system against a dual-socket AMD Epyc 9755 (Turin), both compiled with GNU 15.2. These are unofficial runs — Vera was tested on pre-production reference hardware — so NVIDIA labels some figures as "estimated." But these are real benchmark runs, not extrapolations.
| Metric | Dual Vera | Dual Epyc 9755 | Delta |
|---|---|---|---|
| Overall SPECrate2026_int_base | 925 | 898 | +3.0% |
| Threads | 176 | 256 (128 cores × 2T) | Vera: 31% fewer threads |
| 706.stockfish_r (chess) | 1,370 | — | — |
| 714.cpython_r (Python) | 1,240 | — | — |
| 735.gem5_r (simulation) | 1,300 | — | — |
| 753.ns3_r (networking) | 1,670 | — | — |
| 777.zstd_r (compression) | 483 | — | — |
The headline is clear: Vera beats AMD's best Epyc in integer throughput by 3% while running 31% fewer threads. That's a per-thread advantage of roughly 50%.
But there's nuance. NVIDIA is selectively highlighting per-core performance under full socket load, not the standard SPECrate methodology that emphasizes total throughput. Their argument — and it's a reasonable one — is that agentic AI workloads care about how fast each individual sandbox completes, not just aggregate throughput. If you're running 1,000 concurrent agent environments, the slowest one determines your tail latency.
The Phoronix benchmarks, run on pre-production Vera hardware, paint a broader picture: across the geometric mean of all tested workloads (code compilation, STREAM memory, video encoding, database, Python, Java), Vera came out ~11% ahead of AMD's best Epyc and ~55% ahead of the best single-socket Intel Xeon. It's also 1.63x the performance of NVIDIA's own Grace CPU — a massive generational leap that underscores how much headroom there was in moving from an off-the-shelf Arm design to a custom core.
Per-watt performance data was not permitted in the first round of testing. That's a significant omission — LPDDR5X memory is inherently more efficient than DDR5, and the monolithic die avoids chiplet interconnect power, but the 250-450W TDP range suggests Vera isn't a low-power chip. Efficiency comparisons will have to wait for production silicon.
Vera doesn't exist in isolation. It's one half of the Vera Rubin platform, paired with NVIDIA's next-generation Rubin GPU. And the Rubin GPU is itself a monster:
The combined Vera Rubin NVL72 rack integrates 72 Rubin GPUs, 36 Vera CPUs, ConnectX-9 SuperNICs, and BlueField-4 DPUs — all liquid-cooled and designed to run trillion-parameter models as a single coherent system.
But here's the strategic shift: NVIDIA will also sell Vera as a standalone CPU. Not just as the host processor for Rubin GPUs, but as a general-purpose server CPU in its own right. It's available as a liquid-cooled 256-chip rack, in dual-socket and single-socket configurations, and even extends to storage infrastructure via Vera BlueField-4 STX.
This is the "unhooking" that Cambrian AI Research founder Karl Freund described to CNBC: "The CPU is something they've done to kind of unhook their customers from using Intel or AMD CPUs, and they covet that revenue." NVIDIA doesn't just want to sell you GPUs with a bundled CPU; it wants to sell you the entire data center compute stack.
Intel and AMD have spent decades fighting each other. Now they're fighting NVIDIA on three fronts simultaneously: GPUs (where NVIDIA dominates), networking (where NVIDIA's Mellanox acquisition gave it ~80% market share in InfiniBand), and now CPUs.
The silver lining for AMD and Intel is that they're not standing still. AMD's Zen 6 "Venice" with up to 256 cores is already in mass production and targeting a second-half 2026 release. AMD claims Venice beats Vera by 3.3x at rack-level performance — a claim we'll need to verify when both chips are in production. Intel is preparing its Diamond Rapids platform in response.
Meanwhile, AMD and Intel have seen their stocks surge in 2026 — up 128% and 149% respectively — on the back of agentic AI demand for CPUs. NVIDIA, by comparison, is up only 8%. The market has already priced in the CPU boom; what it hasn't fully priced in is NVIDIA eating a significant portion of it.
Vera creates a genuine third option in the server CPU market. But it also deepens the NVIDIA ecosystem lock-in. If you're running Vera CPUs paired with Rubin GPUs over NVLink-C2C at 1.8 TB/s, the switching cost to an AMD or Intel alternative becomes enormous. NVIDIA's vertical integration strategy — own the GPU, the CPU, the networking, the DPU, the software stack — makes the platform more performant but also more proprietary.
Oracle Cloud Infrastructure is already onboard. OpenAI plans to deploy Vera in large quantities starting this quarter. Anthropic and SpaceX have received units. The major cloud holdouts — AWS, Azure, Google Cloud — haven't been named as partners yet, and their silence is notable.
The most interesting second-order effect is cultural. For years, CPUs have been the boring sibling to GPUs — necessary infrastructure, not the star of the show. Vera makes CPUs exciting again. A custom Arm core with 18 execution pipes, spatial multithreading, native FP8, and 1.2 TB/s of memory bandwidth is a genuinely interesting piece of silicon engineering, regardless of who makes it.
It also validates the Arm server thesis in a way that even AWS Graviton and Ampere haven't. When the world's most valuable semiconductor company bets its CPU future on a custom Arm core, the x86 monopoly isn't just threatened — it's being actively dismantled.
Let's be honest about what we don't know and what might not pan out:
Benchmarks are unofficial and selective. The SPEC CPU 2026 results were run on pre-production hardware with NVIDIA's chosen compiler flags. The per-core normalization obscures total throughput comparisons. We need independent third-party benchmarks on production silicon.
Per-watt performance is unproven. The 250-450W TDP range is wide and, at the high end, comparable to the most power-hungry x86 server chips. LPDDR5X should help, but we need real efficiency data.
Ecosystem maturity. x86 has 40+ years of software compatibility. Arm servers have made huge strides (AWS Graviton is a genuine success), but there are still edge cases, driver gaps, and ISV support issues. Vera's custom Olympus core adds another variable — compiler optimizations that work for Neoverse may not be optimal for Olympus.
AMD and Intel are not static targets. Venice (Zen 6, 256 cores) and Diamond Rapids are coming. The 3% SPECrate lead over Turin is impressive, but Turin isn't AMD's next-gen part. The competitive landscape will look very different in 12 months.
Cloud adoption is unproven. OpenAI and Anthropic are AI labs, not cloud providers. The real test is whether AWS, Azure, or Google Cloud deploy Vera at scale for general-purpose workloads, not just as GPU companions.
The $200B TAM is aspirational. NVIDIA's estimate of a $200 billion server CPU market is roughly 5.4x Bernstein's $37B estimate for 2025. That kind of growth requires agentic AI to fundamentally transform data center workloads. It might — but it also might not.
NVIDIA's Vera CPU is the most ambitious server CPU launch from a non-x86 vendor in history. It beats AMD's Epyc 9755 on integer throughput with fewer threads, it brings genuinely novel architecture (spatial multithreading, native FP8, monolithic die with 3.4 TB/s fabric), and it's designed for the exact workload — agentic AI — that is driving the next wave of data center investment.
The question isn't whether Vera is a good CPU. By every available metric, it is. The question is whether the ecosystem, the cloud providers, and the market will embrace a third CPU architecture from a company that already dominates the GPU market — and whether the performance advantage holds once AMD's Venice and Intel's Diamond Rapids arrive.
For now, though, the CPU crown has a new contender. And it's wearing a green jacket.
ServeTheHome — "Diving Deeper on NVIDIA's Vera CPU: New Architectural Details and SPEC CPU 2026 Benchmarks" — comprehensive architecture analysis with benchmark data. https://www.servethehome.com/diving-deeper-on-nvidias-vera-cpu-new-architectural-details-and-spec-cpu-2026-benchmarks/
CNBC — "Nvidia details next-generation Vera CPU, in challenge to AMD and Intel" — market context, pricing estimates, partner confirmations. https://www.cnbc.com/2026/07/21/nvidia-vera-cpu-ai-amd-intel.html
Tom's Hardware — "Nvidia deep dives Vera CPU for AI data centers — SPEC CPU 2026 benchmarks revealed" — detailed benchmark analysis and per-core normalization discussion. https://www.tomshardware.com/pc-components/cpus/nvidia-spills-the-beans-on-vera-cpu-spec-benchmarks-revealed-olympus-architecture-detailed-and-more
Quartz — "Nvidia Vera CPU specs and benchmarks challenge AMD and Intel" — concise benchmark summary and market share data. https://qz.com/nvidia-vera-cpu-specs-benchmarks-amd-intel-072126
TweakTown — "NVIDIA's Arm-based 'Vera' CPU benchmarked, beats Intel Xeon and AMD EPYC CPUs" — Phoronix benchmarks, AMD Venice counter-claims, revenue projections. https://www.tweaktown.com/news/111829/nvidias-arm-based-vera-cpu-benchmarked-beats-intel-xeon-and-amd-epyc-cpus/index.html
NVIDIA Official — "Next Gen Data Center CPU | NVIDIA Vera CPU" — official specifications, use cases, architecture overview. https://www.nvidia.com/en-us/data-center/vera-cpu/
NVIDIA Developer Blog — "Inside NVIDIA Rubin GPU Architecture: Powering the Era of Agentic AI" — Rubin GPU specifications and Vera Rubin platform context. https://developer.nvidia.com/blog/inside-nvidia-rubin-gpu-architecture-powering-the-era-of-agentic-ai/
All claims verified against Gold-tier (official NVIDIA announcements, whitepaper, developer blog) and Silver-tier (CNBC, Tom's Hardware, ServeTheHome, Quartz, TweakTown) sources. Each source URL was scraped and confirmed accessible. SPEC CPU 2026 results are unofficial (pre-production hardware). Last verified: July 27, 2026.
